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74LS73 - Dual JK Flip-Flop

74LS73 - Dual JK Flip-Flop

74LS73 - Dual JK Flip-Flop

This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative going edge of the clock pulse. The data on the J and K inputs is allowed to change while the clock is HIGH or LOW without affecting the outputs as long as setup and hold times are not violated. A low logic level on the clear input will reset the outputs regardless of the levels of the other inputs.

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  • Views: 859
  • Product Code: 74LS73 - Dual JK Flip-Flop
  • Availability: In Stock
  • Rs21.50

Tags: 74ls73 - dual jk flip-flop, flip, flop, ic, semiconductor, 74ls73, 74ls, dual, jk

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